1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device, and more particularly, to a data driving circuit of an LCD device that displays an image signal by driving a digital to analog converter based on a color gray level displayed, thereby reducing power consumption.
2. Discussion of the Related Art
In general, LCD devices have been widely used for monitors of portable electronic devices such as notebook computers, mobile phones, and personal data accessories. An LCD device typically includes an LCD panel and a data driving circuit. The LCD panel displays image signals, and the data driving circuit applies driving signals from the outside to the LCD panel.
A related art LCD device having an LCD panel and a data driving circuit will be described with reference to the accompanying drawings.
FIG. 1 is a block diagram of the related art LCD device.
As shown in FIG. 1, the LCD device includes an LCD panel 1 and a data driving circuit 2. In the LCD panel 1, gate and data drivers 1a and 1b are formed in a peripheral region of a pixel array in a pixel region of a matrix, by arranging a plurality of gate and data lines. The data driving circuit 2 provides data to the LCD panel 1.
The data driving circuit 2 includes a timing controller 3, a level shifter 4, a digital to analog converter 5, a common voltage amplifier 6, and a power supply 7. The timing controller 3 formats input data, such as display data R, G, and B having, for example, one bit, four bits, or six bits, vertically and horizontally synchronized signals Vsync and Hsync, a clock signal DCLK, and a control signal DTEN. The formatted data is output to the gate and data drivers 1a and 1b so that the respective gate and data drivers 1a and 1b can display a picture image. The level shifter 4 amplifies voltage levels of the clock signal DCLK and the control signal DTEN among the signals output from the timing controller 3. The digital to analog converter 5 converts digital display signals output from the timing controller 3 to analog signals that are appropriate for a liquid crystal driving voltage, and then outputs the analog signals to the LCD panel 1. The common voltage amplifier 6 amplifies a common voltage, and supplies the common voltage to the LCD panel 1 through the power supply 7.
The timing controller 3 may further include a frame memory. Although not shown, two transparent substrates (glass substrates) are attached to each other and are separated by a constant distance, and a liquid crystal is injected between the two transparent substrates, thereby forming the LCD panel.
One of the two transparent substrates includes a plurality of gate lines, each of which are separated by a constant distance from one another. A plurality of data lines cross the gate lines and are also separated by a constant distance from one another. A plurality of pixel electrodes are formed in each pixel region of a matrix which includes the gate and data lines. A plurality of TFTs apply signals from the data lines to the pixel electrodes according to a signal of the gate line. The other transparent substrate includes a color filter film, a common electrode, and a black matrix film.
For LCD panels having the above structure, a circuit structure of a low polysilicon LCD panel is shown in FIG. 2.
Referring to FIG. 2, the LCD panel 1 includes a pixel array, a plurality of first shift registers 11 and first buffers 12, a plurality of second shift registers 13 and second buffers 14, a plurality of signal lines 15, and a plurality of switching devices 16.
In the pixel array, a plurality of gate lines G1–Gm vertically cross a plurality of data lines D1–Dn. The first shift registers 11 and the buffers 12 provide scan signals to each gate line. Each data line is divided into k blocks, and a unit second shift register 13 and a unit buffer 14 are formed in each block of the data line to drive the data line. The plurality of signal lines 15 transmit the image signals output from the digital to analog converter 5 of the data driving circuit 2 to each data line. The plurality of switching devices 16 sequentially apply the image signals of the signal lines 15 to the data lines in order of each block in accordance with driving signals output from the second shift registers 13 and the second buffers 14.
Unlike existing amorphous silicon data driving circuits, the data driving circuit of the low polysilicon TFT LCD panel divides a plurality of data lines into blocks to reduce the number of contact lines between an external circuit and the LCD panel when selecting the gate line, and then sequentially supplies display voltages to the data line.
Accordingly, the digital to analog converter requires a driving capability that can charge the data line for a shorter time as compared with amorphous silicon data driving circuits. To obtain the driving capability, the amplifying driving capability of the digital to analog converter has to be improved. To improve the amplifying driving capability, a standby current has to be increased.
The operation of the aforementioned LCD device will be described with reference to FIG. 3.
Pulse signals g1 and g2 are sequentially applied to each gate line by a gate start signal GSTART and clock signals GCLK and GCLKB. Then, data signals d1 and d2 are applied to each data line by a data start signal DSTART and clock signals DCLK and DCLKB to turn on the switching devices 16, thereby providing image signals of the signal lines 15 to each data line.
At this time, the data driving circuit repeats the operation in each pulse section. That is, the data driving circuit performs the operation of the section “a” in the unit gate pulse section. Accordingly, the driving capability of the data driving circuit of the low polysilicon LCD panel has to be improved as compared with that of the data driving circuit of the amorphous silicon LCD panel.
However, the data driving circuit of the related art LCD device has the following problems.
In general, in electronic devices such as notebook computers and mobile phones having an LCD device, image signals of full color or multigray (over 64 gray) are not always displayed. For example, in a standby mode of mobile phones, a low gray image signal of, for example, letters is displayed.
In electronic devices displaying image signals of full color, multigray level, or low gray level, the data driving circuit of the related art LCD device has only one digital to analog converter having a constant speed and standby current regardless of a gray level of an image picture displayed. Having only one digital to analog converter regardless of the gray level of the image displayed causes unnecessary power consumption.
If the data driving circuit includes a digital to analog converter that displays image signals of full color or a multigray level, even though image signals having a low gray level are displayed, the single digital to analog converter causes a consumption of power corresponding to that of multigray image signals. Accordingly, it is desirable to reduce power consumption in such electronic devices.